Traditional memory devices include a memory element that is used to store a logic state coupled to a selector device. The memory element and selector device may be located at an intersection of a word line and a bit line in a memory array having a three-dimensional architecture. The selector may be coupled to the word line and the memory element may be coupled to the bit line in some architectures. The selector device may reduce leakage currents and be used to select a single memory element for reading and/or writing. However, the use of separate memory elements and selector devices increases the number of materials and/or layers that must be formed during fabrication of the memory device. Activating the selector device and writing to or reading the memory element may require high voltage, high current density, and/or long duration pulses to be provided. These memory requirements may necessitate specific structural solutions that may increase manufacturing complexity and/or cost. The operation requirements may also increase power consumption of the memory device.